TY - GEN
T1 - Precision Exploration of Floating-Point Arithmetic for Spiking Neural Networks
AU - Kwak, Myeongjin
AU - Seo, Hyoju
AU - Kim, Yongtae
N1 - Publisher Copyright:
© 2021 IEEE.
PY - 2021
Y1 - 2021
N2 - In this paper, we explore the precision of various floating-point representations for energy-efficient spiking neural network (SNNs). The IEEE 754 based 32-bit single-precision floating-point and reduced precision floating-point formats are applied to the leaky integrate-And-fire (LIF) neuron of the SNN to investigate the impact the reduced precision on the accuracy performance. When adopted in an unsupervised two-layer SNN for the MNIST digit recognition application, the 16-bit floating-point formats can be used in training and inference of the SNN without any classification performance degradation. Additionally, our experimental result reveals that the floating-point format with 4-bit exponent and 6-bit mantissa is enough for the SNN training and inference and offers great area, power, and energy reductions compared to the others.
AB - In this paper, we explore the precision of various floating-point representations for energy-efficient spiking neural network (SNNs). The IEEE 754 based 32-bit single-precision floating-point and reduced precision floating-point formats are applied to the leaky integrate-And-fire (LIF) neuron of the SNN to investigate the impact the reduced precision on the accuracy performance. When adopted in an unsupervised two-layer SNN for the MNIST digit recognition application, the 16-bit floating-point formats can be used in training and inference of the SNN without any classification performance degradation. Additionally, our experimental result reveals that the floating-point format with 4-bit exponent and 6-bit mantissa is enough for the SNN training and inference and offers great area, power, and energy reductions compared to the others.
KW - floating-point adder
KW - floating-point representation
KW - neuromorphic computing
KW - precision
KW - spiking neural network (SNN)
UR - http://www.scopus.com/inward/record.url?scp=85123342092&partnerID=8YFLogxK
U2 - 10.1109/ISOCC53507.2021.9614005
DO - 10.1109/ISOCC53507.2021.9614005
M3 - Conference contribution
AN - SCOPUS:85123342092
T3 - Proceedings - International SoC Design Conference 2021, ISOCC 2021
SP - 71
EP - 72
BT - Proceedings - International SoC Design Conference 2021, ISOCC 2021
PB - Institute of Electrical and Electronics Engineers Inc.
T2 - 18th International System-on-Chip Design Conference, ISOCC 2021
Y2 - 6 October 2021 through 9 October 2021
ER -