Process to form V-grooved trenches on patterned Si (001) substrates using in situ selective area etching in a MOCVD reactor

We here introduce a novel in situ anisotropic etching process to form a V-grooved trench platform on a patterned Si (001) substrate in a metal-organic chemical vapor deposition (MOCVD) reactor. Such V-grooved trenches were realized by in situ baking of a Ga-exposed Si surface at 760°C in a H2/AsH3 atmosphere of 160 mbar in the reactor. The anisotropic etching during this process forms V-grooves of (111)-terminated Si stems. The result is closely related to the so-called melt-back etch process on the surface of a Ga-Si bond with an AsH3 gas. Furthermore, no signature Ga-As from Si precipitation remains on the etched Si surface after the process, and trench volumes can be controlled by increasing the bake time. As a result, this process enables the formation of patterned V-grooved Si trenches, which is critical to uniformly nucleate III-V material in nano-dimensional device integration without prerequisites such as a chemical process.