Recursive synthesis framework of on-chipmask ROM circuits for scrambled mask pattern generation of binary code

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Abstract

An automatic synthesis framework to generate on-chip mask ROM(read-only memory) circuits as a set of mask patterns is proposed to scramble the original binary hex code of embedded software. Instead of programming flash memory with binary code of compiled embedded software, the software code is synthesized to on-chip CMOS-level transistors based on the basic structure of the mask ROM. Using functional features of Cadence’s Skill™ language, the proposed framework performs the recursive code generation in the two-dimensional way (x-y axis) to build compiled memory layout and schematic netlist simultaneously. The generated physical layout and schematic netlist of the static mask ROM circuits are integrated with the base circuit for a custom-designed mask ROM. The proposed circuit synthesis framework scrambles the original binary code and constructs a custom-designed set of hard-wired transistors for the mask ROM. Case studies show that the proposed framework can accelerate the implementation speed of on-chip hard-wired memory construction by using the proposed automatic synthesis framework instead of manually designing entire circuits.

Original languageEnglish
Pages (from-to)38960-38966
Number of pages7
JournalInternational Journal of Applied Engineering Research
Volume10
Issue number18
StatePublished - 1 Sep 2015

Keywords

  • Low-power wakeup timer
  • Power mode
  • Sensor processor. Approximation

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