Role of the channel on the memory window of HfZrO_x ferroelectric field-effect transistors with p-type Si-doped InZnO_x channel

To elucidate the origin of the memory window (MW) of HfZrO_x ferroelectric field-effect transistors (FeFETs) with a p-type Si-doped InZnO_x (p-Si:InZnO) channel, we perform a comparative study with thin-film transistors (TFTs) in which the HfZrO_x ferroelectric layer (FL) of the FeFETs is replaced by an HfO₂ dielectric layer (DL). The TFT is turned on at a threshold voltage (VT) of − 3 V and exhibits a reliable hysteresis-free transfer curve with a subthreshold swing (SS) of 265 mV/dec. However, when ferroelectric switching occurs in the FeFETs, the dipoles aligned downward in the FL hinder electron accumulation in the channel, yielding a high VT of approximately − 1 V. In contrast, the inverted dipoles in the FL attract electrons owing to the opposite gate voltage, corresponding to program (PGM). Consequently, a low VT (VLT) of − 3 V is achieved, thereby resulting in an MW of 2 V in the FeFETs. Notably, the steepened SS of 250 mV/dec and VLT obtained from the FeFETs during PGM are in good agreement with those obtained from the TFTs, implying that the FeFETs and TFTs are correlated. Moreover, temperature-dependent measurements reveal that the coercive voltage required to rotate the dipoles of the FL remains nearly constant, whereas the VLT and VHT of the FeFETs vary considerably. These results indicate that polarization in the FL serves as a driving force for the back-and-forth movement of electrons in the channel, and the degree of change in the VT of the FeFET is associated with the inherent channel properties.