Safe memory read-path using silent CRC calculation of binary bit-inversion for low-power fast ROM integrity verifcation

Daejin Park, Tag Gon Kim

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

4 Scopus citations

Abstract

The integrity verifcation of on-chip fash memory data as code memory is becoming important in microcontroller-based applications. On-the-fy memory fail-detection without any interruption of CPU operation requires a fast detection method and low-power fash access hardware to provide safety-conscious execution of the user-programmed frmware during system operations. In this paper, newly-designed read-path architecture for an on-chip fash-embedded microcontroller is proposed in order to provide a memory scrambling method that enables fail-safe low-power memory access with zero hardware overhead by embedding the scramble fags on the CRC protection code. Time-multiplexed CRC calculation for bit-inversion binary code is automatically executed with the silent background mode during CPU idle time without any CPU wait cost. Te implementation result shows the de-inversion procedure could be achieved with only additional 1024 bits CRC data in case of 64 sectors for 4 KB fash memory by reducing 75% area of the previous work.

Original languageEnglish
Title of host publicationProceedings 2013 IEEE 3rd International Conference on Consumer Electronics - Berlin, ICCE-Berlin 2013
PublisherIEEE Computer Society
ISBN (Print)9781479914128
DOIs
StatePublished - 2013
Event2013 IEEE 3rd International Conference on Consumer Electronics - Berlin, ICCE-Berlin 2013 - Berlin, Germany
Duration: 8 Sep 201311 Sep 2013

Publication series

NameProceedings 2013 IEEE 3rd International Conference on Consumer Electronics - Berlin, ICCE-Berlin 2013

Conference

Conference2013 IEEE 3rd International Conference on Consumer Electronics - Berlin, ICCE-Berlin 2013
Country/TerritoryGermany
CityBerlin
Period8/09/1311/09/13

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