Abstract
On-the-fly instruction code fail-detection in microcontrollers requires an additional code area, causing the periodic interruption of user software execution to scan the code memory. In this paper, newly designed instruction read-path architecture is proposed in order to provide safety-conscious execution of the user-programmed software. The proposed binary code conversion method generates the executable target code with additional padding data, enabling fast detection of abnormal code executions with small computation resources by representing the intended code execution flow with the corresponding fingerprint digest message. The code integrity verification based on the fingerprint comparison is silently performed with a time-multiplexed inspection method in the background mode. The implementation results show that three times analysis speed up and seven times the current reduction by the proposed read-path architecture, which could be achieved with the hardware overhead of about 0.18um CMOS-based 4500 NAND gates and only additional 1KB fingerprint table in the case of 16 protection sectors.
| Original language | English |
|---|---|
| Pages (from-to) | 5027-5036 |
| Number of pages | 10 |
| Journal | Information |
| Volume | 18 |
| Issue number | 12 |
| State | Published - Dec 2015 |
Keywords
- Binary translation
- Dependable computing
- Fault robust MCU design
- Flash memory