Simulation study on effect of drain underlap in gate-all-around tunneling field-effect transistors

Jae Sung Lee; Jae Hwa Seo; Seongjae Cho; Jung Hee Lee; Shin Won Kang; Jin Hyuk Bae; Eou Sik Cho; In Man Kang

doi:10.1016/j.cap.2013.03.012

Simulation study on effect of drain underlap in gate-all-around tunneling field-effect transistors

Jae Sung Lee, Jae Hwa Seo, Seongjae Cho, Jung Hee Lee, Shin Won Kang, Jin Hyuk Bae, Eou Sik Cho, In Man Kang

School of Electronics Engineering

Research output: Contribution to journal › Article › peer-review

44 Scopus citations

Abstract

In this work, the effects of underlapping drain junction on the performances of gate-all-around (GAA) tunneling field-effect transistors (TFETs) have been studied in terms of direct-current (DC) characteristics including on-current (I_on), off-current (I_off), subthreshold swing (S), and I_on/I_off ratio. In addition, the dependences of intrinsic delay time (τ) and radio-frequency (RF) performances including cut-off frequency (f_T) and maximum oscillation frequency (f _max) on gate-drain capacitance (C_gd) with the underlapping were investigated as the gate length (L_gate) is scaled. A GAA TFET with asymmetric junctions, with an underlap at the drain side, demonstrated DC and RF performances superior to those of a device with symmetric junctions.

Original language	English
Pages (from-to)	1143-1149
Number of pages	7
Journal	Current Applied Physics
Volume	13
Issue number	6
DOIs	https://doi.org/10.1016/j.cap.2013.03.012
State	Published - Aug 2013

Keywords

Asymmetric junctions
Drain underlap
Gate-all-around (GAA)
Radio-frequency (RF)
Tunneling field-effect transistor (TFET)

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10.1016/j.cap.2013.03.012

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title = "Simulation study on effect of drain underlap in gate-all-around tunneling field-effect transistors",

abstract = "In this work, the effects of underlapping drain junction on the performances of gate-all-around (GAA) tunneling field-effect transistors (TFETs) have been studied in terms of direct-current (DC) characteristics including on-current (Ion), off-current (Ioff), subthreshold swing (S), and Ion/Ioff ratio. In addition, the dependences of intrinsic delay time (τ) and radio-frequency (RF) performances including cut-off frequency (fT) and maximum oscillation frequency (f max) on gate-drain capacitance (Cgd) with the underlapping were investigated as the gate length (Lgate) is scaled. A GAA TFET with asymmetric junctions, with an underlap at the drain side, demonstrated DC and RF performances superior to those of a device with symmetric junctions.",

keywords = "Asymmetric junctions, Drain underlap, Gate-all-around (GAA), Radio-frequency (RF), Tunneling field-effect transistor (TFET)",

author = "Lee, {Jae Sung} and Seo, {Jae Hwa} and Seongjae Cho and Lee, {Jung Hee} and Kang, {Shin Won} and Bae, {Jin Hyuk} and Cho, {Eou Sik} and Kang, {In Man}",

year = "2013",

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doi = "10.1016/j.cap.2013.03.012",

language = "English",

volume = "13",

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journal = "Current Applied Physics",

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AU - Lee, Jae Sung

AU - Seo, Jae Hwa

AU - Cho, Seongjae

AU - Lee, Jung Hee

AU - Kang, Shin Won

AU - Bae, Jin Hyuk

AU - Cho, Eou Sik

AU - Kang, In Man

PY - 2013/8

Y1 - 2013/8

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AB - In this work, the effects of underlapping drain junction on the performances of gate-all-around (GAA) tunneling field-effect transistors (TFETs) have been studied in terms of direct-current (DC) characteristics including on-current (Ion), off-current (Ioff), subthreshold swing (S), and Ion/Ioff ratio. In addition, the dependences of intrinsic delay time (τ) and radio-frequency (RF) performances including cut-off frequency (fT) and maximum oscillation frequency (f max) on gate-drain capacitance (Cgd) with the underlapping were investigated as the gate length (Lgate) is scaled. A GAA TFET with asymmetric junctions, with an underlap at the drain side, demonstrated DC and RF performances superior to those of a device with symmetric junctions.

KW - Asymmetric junctions

KW - Drain underlap

KW - Gate-all-around (GAA)

KW - Radio-frequency (RF)

KW - Tunneling field-effect transistor (TFET)

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SP - 1143

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JO - Current Applied Physics

JF - Current Applied Physics

IS - 6

ER -

Simulation study on effect of drain underlap in gate-all-around tunneling field-effect transistors

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Keywords

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