@inproceedings{d5b9cd3e6bee4eda8a9894caae8ab25c,
title = "Stack-transistor based differential 8T SRAM cell for embedded memory applications",
abstract = "In this work, we present a novel 8T SRAM cell that enhances the stability of built-in data storage elements. During a read operation, the proposed cell suppresses a noise-vulnerable '0' node rising, and hence exhibiting near-ideal butterfly curve essential for robust SRAM bit-cell design. The cell itself bears an improved variability tolerance which gives much tight stability distribution across skewed process corners. Implementation results in a 130 nm CMOS technology show that the 8T cell achieves almost 100 % higher read stability compared to the standard 6T cell. The data write-ability and stability tolerance provided with the new cell are also verified under process and temperature variations.",
keywords = "8T cell, data stability, embedded memory, SRAM",
author = "Weijie Cheng and Baolong Zhou and Huarong Zheng and Yeonbae Chung",
year = "2012",
doi = "10.1109/EDSSC.2012.6482890",
language = "English",
isbn = "9781467356961",
series = "2012 IEEE International Conference on Electron Devices and Solid State Circuit, EDSSC 2012",
booktitle = "2012 IEEE International Conference on Electron Devices and Solid State Circuit, EDSSC 2012",
note = "2012 8th IEEE International Conference on Electron Devices and Solid-State Circuits, EDSSC 2012 ; Conference date: 03-12-2012 Through 05-12-2012",
}