Sub-50 nm Terahertz In_0.8Ga_0.2As Quantum-Well High-Electron-Mobility Transistors for 6G Applications

We present a systematic study on the gate length ( L_g) scaling behavior and the impact of the side-recess spacing (L_side) on dc and high-frequency characteristics of In_0.8Ga_0.2As quantum-well (QW) high-electron-mobility transistors (HEMTs) with L_g from 10 μ m to 20 nm, for the purpose of understanding the scaling limit of maximum oscillation frequency (fmax) and thereby demonstrating terahertz devices. The fabricated In_0.8Ga_0.2As QW HEMTs with L_g =20 nm and L_side =150 nm exhibited values of drain-induced-barrier-lowering (DIBL) of 60 mV/V, current-gain cutoff frequency (fT) of 0.75 THz, and fmax of 1.1 THz, while the device with L_side =50 nm showed DIBL of 110 mV/V and fT/fmax of 0.72/0.53 THz. It was central to strictly control short-channel effects (SCEs) from the perspective of DIBL to maximize the improvement of fmax, as L_g was scaled down deeply. In an effort to understand the L_g scaling behavior of fmax, we carried out the small-signal modeling for both types of devices and found that the increase of the intrinsic output conductance (goi) played a critical role in determining fmax in short-L_g HEMTs. On the contrary, the fabricated devices with L_side =150 nm exhibited a tight control of SCEs at L_g of 20 nm. As a result, fmax in those devices was boosted to 1.1 THz, and more importantly this high fmax was maintained even as Lg was scaled down to 20 nm. The results in this work represent the best balance of f_T and f_max in any transistor technology on any material system, displaying both fT and fmax in excess of 700 GHz simultaneously.