Theoretical and experimental analysis of the source resistance components in In_0.7Ga_0.3As quantum-well high-electron-mobility transistors

Herein we describe theoretical and experimental analysis of the source resistance (R_s) components in In_0.7Ga_0.3As/In_0.52Al_0.48As quantum-well (QW) high-electron-mobility transistors (HEMTs) on an InP substrate. First, we analytically modeled R_s using a three-layer formula, separately modeling the regions of the ohmic contact, the gate-to-source access, and the side-recessed regions. The resistances of the ohmic contact and access regions were analyzed in a distributed-network manner with two different transfer lengths, whereas the resistance associated with the side-recess region near the gate edge was modeled by using a lumped element. To verify the accuracy of the proposed R_s model, we fabricated two different types of transmission-line-method (TLM) test patterns as well as long-channel In_0.7Ga_0.3As/In_0.52Al_0.48As QW HEMTs, and compared their measured and modeled R_s. The modeled R_s was in excellent agreement with the measured R_s from the recessed TLM patterns and the long-channel HEMTs. Since the widths of the ohmic contact to the heavily doped In_0.53Ga_0.47As capping layer and the gate-to-source access region were typically much greater than corresponding transfer lengths (L_{T_cap} and L_{T_barrier}), those distributed networks could be simplified to a lumped-element based one-layer model, revealing that the tunneling resistance (R_barrier) through the In_0.52Al_0.48As barrier should be carefully considered to minimize the R_s of In_xGa_1−xAs QW HEMTs together with S/D contact resistances and L_GS.