Towards Quantized Stochastic Computing by Leveraging Reduced Precision Binary Numbers through Bit Truncation

Donghui Lee, Yongtae Kim

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

2 Scopus citations

Abstract

Stochastic computing (SC) offers high hardware efficiency and error tolerance but faces challenges, such as the overhead of converting between binary and stochastic forms. This paper introduces a novel quantized SC architecture, significantly reducing stochastic number generator (SNG) hardware complexity. We achieve this by quantizing binary numbers to lower precision using various bit truncation schemes, thereby reducing SNG overhead. Implemented in a 65-nm CMOS process, our proposed quantized SNG reduces area and power by up to 65.5% and 73.0%, respectively, compared to the conventional full-precision SNG. We also demonstrate that our SC schemes have minimal impact on processing quality while greatly improving hardware efficiency, as seen in a digital image processing application.

Original languageEnglish
Title of host publicationProceedings - 2023 IEEE 41st International Conference on Computer Design, ICCD 2023
PublisherInstitute of Electrical and Electronics Engineers Inc.
Pages419-422
Number of pages4
ISBN (Electronic)9798350342918
DOIs
StatePublished - 2023
Event41st IEEE International Conference on Computer Design, ICCD 2023 - Washington, United States
Duration: 6 Nov 20238 Nov 2023

Publication series

NameProceedings - IEEE International Conference on Computer Design: VLSI in Computers and Processors
ISSN (Print)1063-6404

Conference

Conference41st IEEE International Conference on Computer Design, ICCD 2023
Country/TerritoryUnited States
CityWashington
Period6/11/238/11/23

Keywords

  • bit truncation
  • comparator
  • quantization
  • stochastic computing
  • stochastic number generator

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