TY - GEN
T1 - Towards Quantized Stochastic Computing by Leveraging Reduced Precision Binary Numbers through Bit Truncation
AU - Lee, Donghui
AU - Kim, Yongtae
N1 - Publisher Copyright:
© 2023 IEEE.
PY - 2023
Y1 - 2023
N2 - Stochastic computing (SC) offers high hardware efficiency and error tolerance but faces challenges, such as the overhead of converting between binary and stochastic forms. This paper introduces a novel quantized SC architecture, significantly reducing stochastic number generator (SNG) hardware complexity. We achieve this by quantizing binary numbers to lower precision using various bit truncation schemes, thereby reducing SNG overhead. Implemented in a 65-nm CMOS process, our proposed quantized SNG reduces area and power by up to 65.5% and 73.0%, respectively, compared to the conventional full-precision SNG. We also demonstrate that our SC schemes have minimal impact on processing quality while greatly improving hardware efficiency, as seen in a digital image processing application.
AB - Stochastic computing (SC) offers high hardware efficiency and error tolerance but faces challenges, such as the overhead of converting between binary and stochastic forms. This paper introduces a novel quantized SC architecture, significantly reducing stochastic number generator (SNG) hardware complexity. We achieve this by quantizing binary numbers to lower precision using various bit truncation schemes, thereby reducing SNG overhead. Implemented in a 65-nm CMOS process, our proposed quantized SNG reduces area and power by up to 65.5% and 73.0%, respectively, compared to the conventional full-precision SNG. We also demonstrate that our SC schemes have minimal impact on processing quality while greatly improving hardware efficiency, as seen in a digital image processing application.
KW - bit truncation
KW - comparator
KW - quantization
KW - stochastic computing
KW - stochastic number generator
UR - http://www.scopus.com/inward/record.url?scp=85182316351&partnerID=8YFLogxK
U2 - 10.1109/ICCD58817.2023.00069
DO - 10.1109/ICCD58817.2023.00069
M3 - Conference contribution
AN - SCOPUS:85182316351
T3 - Proceedings - IEEE International Conference on Computer Design: VLSI in Computers and Processors
SP - 419
EP - 422
BT - Proceedings - 2023 IEEE 41st International Conference on Computer Design, ICCD 2023
PB - Institute of Electrical and Electronics Engineers Inc.
T2 - 41st IEEE International Conference on Computer Design, ICCD 2023
Y2 - 6 November 2023 through 8 November 2023
ER -